Designed a 16 bit pipe-lined multiplier using the concept of partial products. DRC check and LVS match were performed. It was designed using cadence spectre with almost equal fall and rise delays.

Building a robot that can reliably perceive, plan, and act in the real world is hard—especially when conditions change minute ...

Efficient Large Displacement/Large Rotation Dynamic Simulations Using Nonlinear Dynamic Substructures Utilizing reduced-order dynamic math models (DMM) in linear system-level dynamic analyses is a ...