Duke Pratt School of Engineering

Study Finds Next-Generation Transistor Performance Inflated in Most Lab Testing

Duke engineers show how a common device architecture used to test 2D transistors overstates their performance prospects in real-world devices.
AZoNano

Using Graphene Field Effect Transistors in Biosensors

A field effect transistor (FET) is a carrier device with three terminals: source, drain, and gate. In FETs, an electric field can be applied at the terminal of the gate, modifying the conductive ...
Compound Semiconductor

Has 2D transistors' performance been inflated?

The research 'Impact of Contact Gating on Scaling of Monolayer 2D Transistors Using a Symmetric Dual-Gate Structure' appeared ...
EDN

Programmable Unijunction Transistor (PUT) – A Quick Rescript

What is a Programmable Unijunction Transistor (PUT)? Simple – it is a three-lead electronic semiconductor device, similar to a unijunction transistor (UJT), except that its behaviour can be controlled ...
Nanowerk

Common lab design inflates 2D transistor performance by up to six times

Lab architecture used to test 2D semiconductors artificially boosts performance metrics, making it harder to assess whether these materials can truly replace silicon.